Source file hardcaml__.ml
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(** @canonical Hardcaml.Architecture *)
module Architecture = Hardcaml__Architecture
(** @canonical Hardcaml.Assertion_manager *)
module Assertion_manager = Hardcaml__Assertion_manager
(** @canonical Hardcaml.Assertions *)
module Assertions = Hardcaml__Assertions
(** @canonical Hardcaml.Async_fifo *)
module Async_fifo = Hardcaml__Async_fifo
(** @canonical Hardcaml.Before_and_after_edge *)
module Before_and_after_edge = Hardcaml__Before_and_after_edge
(** @canonical Hardcaml.Binable_circuit *)
module Binable_circuit = Hardcaml__Binable_circuit
(** @canonical Hardcaml.Bits_packed *)
module Bits_packed = Hardcaml__Bits_packed
(** @canonical Hardcaml.Build_mode *)
module Build_mode = Hardcaml__Build_mode
(** @canonical Hardcaml.Circuit *)
module Circuit = Hardcaml__Circuit
(** @canonical Hardcaml.Circuit_coverage *)
module Circuit_coverage = Hardcaml__Circuit_coverage
(** @canonical Hardcaml.Circuit_database *)
module Circuit_database = Hardcaml__Circuit_database
(** @canonical Hardcaml.Circuit_utilization *)
module Circuit_utilization = Hardcaml__Circuit_utilization
(** @canonical Hardcaml.Clocked_design *)
module Clocked_design = Hardcaml__Clocked_design
(** @canonical Hardcaml.Combinational_op *)
module Combinational_op = Hardcaml__Combinational_op
(** @canonical Hardcaml.Combinational_ops_database *)
module Combinational_ops_database = Hardcaml__Combinational_ops_database
(** @canonical Hardcaml.Core0 *)
module Core0 = Hardcaml__Core0
(** @canonical Hardcaml.Coverage *)
module Coverage = Hardcaml__Coverage
(** @canonical Hardcaml.Coverage_debug *)
module Coverage_debug = Hardcaml__Coverage_debug
(** @canonical Hardcaml.Coverage_instance *)
module Coverage_instance = Hardcaml__Coverage_instance
(** @canonical Hardcaml.Coverage_intf *)
module Coverage_intf = Hardcaml__Coverage_intf
(** @canonical Hardcaml.Coverage_report *)
module Coverage_report = Hardcaml__Coverage_report
(** @canonical Hardcaml.Cyclesim *)
module Cyclesim = Hardcaml__Cyclesim
(** @canonical Hardcaml.Cyclesim0 *)
module Cyclesim0 = Hardcaml__Cyclesim0
(** @canonical Hardcaml.Cyclesim0_intf *)
module Cyclesim0_intf = Hardcaml__Cyclesim0_intf
(** @canonical Hardcaml.Cyclesim_clock_domain *)
module Cyclesim_clock_domain = Hardcaml__Cyclesim_clock_domain
(** @canonical Hardcaml.Cyclesim_combine *)
module Cyclesim_combine = Hardcaml__Cyclesim_combine
(** @canonical Hardcaml.Cyclesim_compile *)
module Cyclesim_compile = Hardcaml__Cyclesim_compile
(** @canonical Hardcaml.Cyclesim_coverage *)
module Cyclesim_coverage = Hardcaml__Cyclesim_coverage
(** @canonical Hardcaml.Cyclesim_float_ops *)
module Cyclesim_float_ops = Hardcaml__Cyclesim_float_ops
(** @canonical Hardcaml.Cyclesim_float_ops_intf *)
module Cyclesim_float_ops_intf = Hardcaml__Cyclesim_float_ops_intf
(** @canonical Hardcaml.Cyclesim_intf *)
module Cyclesim_intf = Hardcaml__Cyclesim_intf
(** @canonical Hardcaml.Cyclesim_lookup *)
module Cyclesim_lookup = Hardcaml__Cyclesim_lookup
(** @canonical Hardcaml.Cyclesim_lookup_intf *)
module Cyclesim_lookup_intf = Hardcaml__Cyclesim_lookup_intf
(** @canonical Hardcaml.Cyclesim_ops *)
module Cyclesim_ops = Hardcaml__Cyclesim_ops
(** @canonical Hardcaml.Dedup *)
module Dedup = Hardcaml__Dedup
(** @canonical Hardcaml.Design_rule_checks *)
module Design_rule_checks = Hardcaml__Design_rule_checks
(** @canonical Hardcaml.Fifo *)
module Fifo = Hardcaml__Fifo
(** @canonical Hardcaml.Fifo_intf *)
module Fifo_intf = Hardcaml__Fifo_intf
(** @canonical Hardcaml.Flags_vector *)
module Flags_vector = Hardcaml__Flags_vector
(** @canonical Hardcaml.Flags_vector_intf *)
module Flags_vector_intf = Hardcaml__Flags_vector_intf
(** @canonical Hardcaml.Hierarchy *)
module Hierarchy = Hardcaml__Hierarchy
(** @canonical Hardcaml.Instantiation *)
module Instantiation = Hardcaml__Instantiation
(** @canonical Hardcaml.Mangler *)
module Mangler = Hardcaml__Mangler
(** @canonical Hardcaml.Property *)
module Property = Hardcaml__Property
(** @canonical Hardcaml.Property_manager *)
module Property_manager = Hardcaml__Property_manager
(** @canonical Hardcaml.Ram *)
module Ram = Hardcaml__Ram
(** @canonical Hardcaml.Read_write_port *)
module Read_write_port = Hardcaml__Read_write_port
(** @canonical Hardcaml.Reserved_words *)
module Reserved_words = Hardcaml__Reserved_words
(** @canonical Hardcaml.Rtl *)
module Rtl = Hardcaml__Rtl
(** @canonical Hardcaml.Rtl_ast *)
module Rtl_ast = Hardcaml__Rtl_ast
(** @canonical Hardcaml.Rtl_compatibility *)
module Rtl_compatibility = Hardcaml__Rtl_compatibility
(** @canonical Hardcaml.Rtl_config *)
module Rtl_config = Hardcaml__Rtl_config
(** @canonical Hardcaml.Rtl_intf *)
module Rtl_intf = Hardcaml__Rtl_intf
(** @canonical Hardcaml.Rtl_language *)
module Rtl_language = Hardcaml__Rtl_language
(** @canonical Hardcaml.Rtl_name *)
module Rtl_name = Hardcaml__Rtl_name
(** @canonical Hardcaml.Rtl_verilog_of_ast *)
module Rtl_verilog_of_ast = Hardcaml__Rtl_verilog_of_ast
(** @canonical Hardcaml.Rtl_vhdl_of_ast *)
module Rtl_vhdl_of_ast = Hardcaml__Rtl_vhdl_of_ast
(** @canonical Hardcaml.Scope *)
module Scope = Hardcaml__Scope
(** @canonical Hardcaml.Side *)
module Side = Hardcaml__Side
(** @canonical Hardcaml.Signal_coverage *)
module Signal_coverage = Hardcaml__Signal_coverage
(** @canonical Hardcaml.Signal_graph *)
module Signal_graph = Hardcaml__Signal_graph
(** @canonical Hardcaml.Simulation_memory *)
module Simulation_memory = Hardcaml__Simulation_memory
(** @canonical Hardcaml.Structural *)
module Structural = Hardcaml__Structural
(** @canonical Hardcaml.Structural_intf *)
module Structural_intf = Hardcaml__Structural_intf
(** @canonical Hardcaml.Topsort *)
module Topsort = Hardcaml__Topsort
(** @canonical Hardcaml.Vcd *)
module Vcd = Hardcaml__Vcd
(** @canonical Hardcaml.Wave_data *)
module Wave_data = Hardcaml__Wave_data
(** @canonical Hardcaml.Wave_data_in_cycles *)
module Wave_data_in_cycles = Hardcaml__Wave_data_in_cycles
(** @canonical Hardcaml.Wave_data_in_cycles_intf *)
module Wave_data_in_cycles_intf = Hardcaml__Wave_data_in_cycles_intf
(** @canonical Hardcaml.Wave_data_in_events *)
module Wave_data_in_events = Hardcaml__Wave_data_in_events
(** @canonical Hardcaml.Wave_data_in_events_intf *)
module Wave_data_in_events_intf = Hardcaml__Wave_data_in_events_intf
(** @canonical Hardcaml.Wave_data_intf *)
module Wave_data_intf = Hardcaml__Wave_data_intf
module Hardcaml__ = struct end
[@@deprecated "this module is shadowed"]