hardcaml_lws
Hardcaml_lws
module Lws : sig ... end
Entry point for writing testbenches with LWS. Testbench implementation code should primarily interact with this module.
module Lws_cyclesim : sig ... end
A cyclesim-backed backend for running LWS programs.
module Lws_evsim : sig ... end
module Lws_runtime : sig ... end
module Lws_context : sig ... end
Ports the testbench can interact with in simulations.