Module Hardcaml_kernel.AlwaysSource

Sourcemodule type S = sig ... end
include S with module Signal := Signal
Sourcemodule Variable : sig ... end

The type of variables in guarded assignments. Variables may be asychronous wires, or synchronous regs. The current value of the variable may be accessed through the value field below.

Sourcetype assign_internal
Sourcetype if_internal
Sourcetype match_internal
Sourcetype switch_internal
Sourcetype match_ = private {
  1. value : Hardcaml_kernel__.Signal__type.t * t list;
  2. internal : match_internal;
}
Sourceand t = private
  1. | Assign of {
    1. value : Variable.t * Hardcaml_kernel__.Signal__type.t;
    2. internal : assign_internal;
    }
  2. | If of {
    1. value : Hardcaml_kernel__.Signal__type.t * t list * t list;
    2. internal : if_internal;
    }
  3. | Switch of {
    1. value : Hardcaml_kernel__.Signal__type.t * match_ list;
    2. internal : switch_internal;
    }
Sourceval sexp_of_match_ : match_ -> Sexplib0.Sexp.t
Sourceval sexp_of_t : t -> Sexplib0.Sexp.t
Sourcetype 'a case = 'a * t list
Sourcetype 'a cases = 'a case list
Sourceval if_ : here:lexing_position -> Hardcaml_kernel__.Signal__type.t -> t list -> t list -> t

if statement

Sourceval elif : here:lexing_position -> Hardcaml_kernel__.Signal__type.t -> t list -> t list -> t list

else if branch

Sourceval else_ : t list -> t list

else branch (for readability)

Sourceval when_ : here:lexing_position -> Hardcaml_kernel__.Signal__type.t -> t list -> t

if sel then ... else

Sourceval unless : here:lexing_position -> Hardcaml_kernel__.Signal__type.t -> t list -> t

if sel then else ...

Sourceval switch : here:lexing_position -> Hardcaml_kernel__.Signal__type.t -> Hardcaml_kernel__.Signal__type.t cases -> t

switch statement

Sourceval proc : here:lexing_position -> t list -> t

Allows sequences of expressions to be inserted into the code; a syntactic nicety.

Sourceval (<--) : Variable.t -> Hardcaml_kernel__.Signal__type.t -> t

assignment

Sourceval (<--.) : Variable.t -> int -> t

assign an integer constant - width is inferred and value is truncated.

Sourceval (<-:.) : Variable.t -> int -> t

assign an unsigned integer constant

Sourceval (<-+.) : Variable.t -> int -> t

assign a signed integer constant

Sourceval incr : ?by:int -> Variable.t -> t

increment (defaults to 1)

Sourceval decr : ?by:int -> Variable.t -> t

decrement (defaults to 1)

Sourcemodule State_machine : sig ... end
Sourceval compile : t list -> unit

compile to structural code

Sourcemodule Clocked : sig ... end