Signal.UnsignedSourceUnsigned vector operations (ie may operate on Bits.t or Signal.t directly).
val (+:) :
Hardcaml_kernel__.Signal__type.t ->
Hardcaml_kernel__.Signal__type.t ->
Hardcaml_kernel__.Signal__type.tAddition. Arguments are extended appropriately and result is 1 bit wider to avoid truncation.
val (-:) :
Hardcaml_kernel__.Signal__type.t ->
Hardcaml_kernel__.Signal__type.t ->
Hardcaml_kernel__.Signal__type.tSubtraction. Arguments are extended appropriately and result is 1 bit wider to avoid truncation.
val (*:) :
Hardcaml_kernel__.Signal__type.t ->
Hardcaml_kernel__.Signal__type.t ->
Hardcaml_kernel__.Signal__type.tMultiplication.
Arguments need not be the same width.
val (<:) :
Hardcaml_kernel__.Signal__type.t ->
Hardcaml_kernel__.Signal__type.t ->
Hardcaml_kernel__.Signal__type.tval (>:) :
Hardcaml_kernel__.Signal__type.t ->
Hardcaml_kernel__.Signal__type.t ->
Hardcaml_kernel__.Signal__type.tval (<=:) :
Hardcaml_kernel__.Signal__type.t ->
Hardcaml_kernel__.Signal__type.t ->
Hardcaml_kernel__.Signal__type.tval (>=:) :
Hardcaml_kernel__.Signal__type.t ->
Hardcaml_kernel__.Signal__type.t ->
Hardcaml_kernel__.Signal__type.tval (==:) :
Hardcaml_kernel__.Signal__type.t ->
Hardcaml_kernel__.Signal__type.t ->
Hardcaml_kernel__.Signal__type.tval (<>:) :
Hardcaml_kernel__.Signal__type.t ->
Hardcaml_kernel__.Signal__type.t ->
Hardcaml_kernel__.Signal__type.tResize argument to given width. Appropriate extension is performed.
val truncate :
Hardcaml_kernel__.Signal__type.t ->
width:int ->
(Hardcaml_kernel__.Signal__type.t, Hardcaml_kernel__.Signal__type.t)
Hardcaml_kernel__.Comb_intf.with_valid2Reduce the width of t to width bits. The result is valid if the value fits within width bits.